; GAMMA.MAC --- J11 Macro File for (3He,t)-Gamma Test Measurement ; ver 1.00 31-JUL-1995 by A. Tamii ; ver 1.1 02-OCT-1995 by K.Isibasi ;------------------------------------------------------------------------------ .include 'daqlib$src:bit.mac' ; Event Bit Definitions .include 'daqlib$src:module.mac' ; Module Read Macros ;------------------------------------------------------------------------------ ; ;------------------------------------------------------------------------------ chksum=0 ; append check sum region ; TRUE ... 1, FALSE ... 0 or No-Definied ;------------------------------------------------------------------------------ ; ;------------------------------------------------------------------------------ noprg=20. ; output register station number (default=20) ;------------------------------------------------------------------------------ ; ;------------------------------------------------------------------------------ rdznl = 4000 ; size of reg region (default=2000=1KB) ;------------------------------------------------------------------------------ ; ;=========================== CRATE-0 Definitions ============================== ;//crate_0// ; ; -------------------------- Definitions of Constants -------------------------- ; 25. ; Crate Controler ; 24. ; Crate Controler ; 23. ; Not Used (N.U) ; 22. ; J11 ; 21. ; Output Register ; 20. ; Output Register NCOIN = 19. ; Coincidence Register ; 18. ; N.U ; 17. ; N.U ; 16. ; N.U NVDC = 15. ; 4299 VDC (GR) ; 14 ; N.U NTDC = 13. ; TDC (GR) ; 12. ; for TFC 1 (FERET) ; 11. ; N.U ; 10. ; N.U ; NFERE1 = 9. ; FERA for FERET 1 ; 8. ; for FERA-Driver ; 7. ; N.U NFERA1 = 6. ; FERA 1 ; 5. ; for FERA-Driver NTDCF = 4. ; 2228TDC for NaI NADCF = 3. ; 2249LADC for NaI NSCAL2 = 2. ; Scaler2 NSCAL1 = 1. ; Scaler1 ; ------------------------------ Run Start Actions ---------------------------- ;//run// ; naf NFERA1,0,9. ; clear FERA 1 ; naf NFERE1,0,9. ; clear FERET 1 naf NVDC,0,9. ; clear 4299 (VDC-GR) naf NTDC,0,9. ; clear TDC (GR) naf NTDCF,0,9. ; clear TDC (NaI) naf NADCF,0,9. ; clear ADC (NaI) naf NCOIN,0,9. ; clear Coincidence Register naf NSCAL1,0,9. ; clear Scaler1 naf NSCAL2,0,9. ; clear Scaler2 naf NTDC,0,26. ; Enable TDC naf NTDCF,0,26. ; Enable TDC (NaI) ; ; ; ------------------------------ Run Stop Actions ---------------------------- ;//stop// ; ; ; -------------------------------- Event Actions ----------------------------- ;//event// ; .list me ; ; [COMMON] COIN NCOIN,r3 ; Coincidence Register (event type->r3) naf NCOIN,0,9. ; clear Coincidence Register seq2: bit #BCOIN,r3 ; COIN bne seq2c ; [to GR+NaI] jmp seq3 ; [to GR] seq2c: ; ; [GR+NaI] L4300 NFERA1,A ; FERA1(ADC) ; L4300 NFERE1,T ; FERET1(TDC) L2228 NTDC,5. ; TDC(GR) (0-4ch) L4299 NVDC,V ; 4299(VDC) L2228 NTDCF,6. ; TDC(NaI) (0-5ch) L2249 NADCF,6. ; ADC(NaI) (0-5ch) f 9. ; set clear function nar NFERA1,0,r0 ; dummy read to clear modules ; nar NFERE1,0,r0 ; nar NTDC,0,r0 ; (GR) nar NVDC,0,r0 ; (GR) nar NTDCF,0,r0 ; (NaI) nar NADCF,0,r0 ; (NaI) naf NTDC,0,26. ; enable TDC (GR) naf NTDCF,0,26. ; enable TDC (NaI) jmp seq4 seq3: bit #BGR,r3 ; GR bne seq3c ; [to GR] jmp seq4 ; [to TEST 0] seq3c: ; ; [GR] L4300 NFERA1,A ; FERA1(ADC) ; L4300 NFERE1,T ; FERET1(TDC) L2228 NTDC,5. ; TDC(GR) (0-4ch) L4299 NVDC,V ; 4299(VDC) f 9. ; set clear function nar NFERA1,0,r0 ; dummy read to clear modules ; nar NFERE1,0,r0 ; nar NTDC,0,r0 ; nar NTDCF,0,r0 ; nar NADCF,0,r0 ; nar NVDC,0,r0 ; naf NTDC,0,26. ; enable TDC (GR) naf NTDCF,0,26. ; enable TDC (NaI) ; br seq4 seq4: ; ; ----------------------------- Block End Actions ----------------------------- ;//block_end// ; L2551 NSCAL1,12. ; Scaler1 (0-11ch) L2551 NSCAL2,12. ; Scaler2 (0-11ch) naf NSCAL1,0,9. ; naf NSCAL2,0,9. ; ;================================= End of File =================================