LeCroy 2366 Universal Logic Module を用いた Trigger 回路
I/O pin assignment	24th July 2001 H.P.Yoshida

Standerd(based on p2p mode)

Front B Input
      B1	GR Signal-1(scintillater position#1)
      B2	GR Signal-2(scintillater position#2)
      B3	GR Signal-3(scintillater position#3) <- before Carbon block
      B4	GR Signal-4(Hodoscope position#x)  
      B5	GR Signal-5(Hodoscope position#y)
      B6	LAS Trigger
      B7	Delayed LAS Trigger
      B8	External Veto
      B9	LAS FERA request
      B10	LAS 3377 TEMD
      B11	Initializing Signal
      B12	SSD OR
      B13	FERA ReQuest additional 1st
      B14	FERA ReQuest additional 2nd
      B15	FERA ReQuest additional 3rd(3351) 
      B16	(Not used)